Data storage devices and memories may be classified into two types: volatile and non-volatile. Whereas power must be provided to a volatile memory to maintain its stored information, a non-volatile memory may be powered down yet still retain the stored information. Examples of non-volatile memory include Electrically Erasable Programmable Read Only Memory (EEPROM) and flash. Static Random Access Memory (SRAM) is a conventional example of a volatile memory.
Both volatile and non-volatile memories may be used to store the configuration data for programmable logic devices. Traditionally, a type of programmable logic device known as a Complex Programmable Logic Device (CPLD) has stored its configuration data in a non-volatile memory such as EEPROM. In contrast to CPLDs, another type of programmable logic device known as a Field Programmable Gate Array (FPGA) typically stores its configuration data in an SRAM. Such SRAM-based FPGAs must thus be reconfigured upon power-up from an external non-volatile memory (often denoted as a boot memory). However, SRAM-based FPGAs are typically capable of handling complex logic designs more efficiently than CPLDs and have thus become dominant in the programmable logic device market.
As SRAM-based FPGAs continue to grow in complexity, the corresponding amount of SRAM needed to store the configuration data must grow as well. A conventional external non-volatile memory used to boot the configuration data into an SRAM-based FPGA is a Programmable Read Only Memory (PROM). However, the rise in popularity in devices such as digital cameras has caused flash memory to become cheaper and also faster in comparison to traditional PROMs. Thus, FPGAs have been developed to use flash as their external configuration memories. To further reduce costs, flash memories are now available that use the low-cost Serial Peripheral Interface (SPI) standard, an interface standard specified by Motorola Corporation of Schaumburg, Ill. Conventional FPGAs using SPI flash as their external configuration memories are limited, however, to downloading their configuration bit stream from just a single SPI flash.
Accordingly, there is need in the art for programmable logic devices supporting improved SPI flash configuration modes.